The QDESYS Motor Control FPGA IP is a Xilinx Vivado IP integrator library to simplify the creation of motor control systems based on Xilinx FPGA.

The IP core consist of several small function blocks that implements the required mathematics and logical function including storage for working data.

The mosysfoc is high level with AXI4-Lite IP interface for easily connection to Microblaze, Zynq, ZynqMP microcontrollers and custom AXI-Master IP’s.

The motorfoc is bus-free solution with direct access to core signals.

An unified IP Interface is defined to connect the power board specific IP and real-time data logger.